Main Management
24 important questions on Main Management
The CPU has access to 2 types of storage - what are they?
- Registers - quicker than main memory (access in one clock cycle or less)
- Main memory - slower because it is done through a bus, which can cause a stall - to deal with this, caches are used (which are normally on the same chip as the CPU)
What are base and limit registers?
The CPU must check every memory access generated in user mode to be sure its between base and limit for that user
What is the limit register?
- each logical address must be less than the limit register
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What loads the base and limit registers?
= this operation is done in the kernel mode so the user cannot interact with it directly
What is the algorithm for the hardware access protection mechanism?
- if the address is greater than or equal to the base address of the process, it will continue (if it is not, the OS will raise a fatal error)
- it will then check if it is smaller than the base and the limit. If yes, access to the memory is granted. If no, the OS will raise a fatal error
What is the difference between logical address and the physical address?
- Physical address - an array of bytes with different addresses. The address seen by the memory unity
- Logical address (virtual address) - where an item appears to reside from the perspective of an executing application program. It is generated by the CPU
A logical address is mapped to a physical address
When can the binding of instructions and data to memory addresses be done?
- Compile time -> the translation of logical addresses to physical addresses at the time of compilation. This type of binding is only possible when we know the contents of the memory in advance
- Load time -> the translation of logical addresses to physical addresses at the time of loading. Must generate relocatable code if memory location is not known at compile time
- Execution time -> happens in modern processors where multiprogramming is supported - binding delayed until run time if the process can be moved during its execution from one memory segment to another. This is supported by hardware
What is the memory management unit (MMU)?
How does the MMU map virtual address to physical addresses?
The base register is now called the relocation register
This binding happens at execution time when a reference is made to a specific location in memory
What is dynamic relocation (dynamic loading)?
- this allows better memory-space utilisation
This is especially useful when large amounts of code are needed to handle infrequently occurring cases
- no special support from the OS is required -> though the OS can help by providing libraries to implement dynamic loading
What is the backing store
- fast disk large enough to accommodate copies of all memory images for all users; must provide direct access to these memory images
Why is swapping not used in modern systems? What do these systems use now?
The systems now use modified versions of swapping
- ● Swapping normally disabled
- ● Started if more than threshold amount of memory allocated
- ● Disabled again once memory demand reduced below threshold
What is contiguous memory allocation?
Each process is contained in one single block
The main memory is usually divided into tow partitions:
- OS system code
- User code
Why do we need memory protection?
-> relocation registers are used to prevent this
What is multiple-partition allocation?
What was multiple-partition allocation replaced by?
i.e. if it needs more memory, it will be given a bigger partition
- Hole - block of available memory (basically and empty partition)
- If the processor is too big, then the system will skip it and move onto the next process which can hopefully fill the hole
OS maintains information about the allocated partitions and the free ones
What are 3 techniques to allocate free holes to processes?
First-fit: Allocate the first hole that is big enough
Best-fit: Allocate the smallest hole that is big enough; must search entire list, unless ordered by size
● Produces the smallest leftover hole
Worst-fit: Allocate the largest hole; must also search entire list
● Produces the largest leftover hole
---> First-fit and best-fit better than worst-fit in terms of speed and storage utilisation
What is external fragmentation?
Total memory space exists to satisfy a request, but it is not contiguous
i.e. the hole fragments are not contiguous so the process cannot fit it
What is internal fragmentation?
Allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used
It is called internal fragmentation because it involves memory that is not used which is internal to a specific partition
How can we reduce external fragmentation?
Compaction is possible only if relocation is dynamic, and is done at execution time
- because when you do it at execution time, you just change the base address of the processes in the base register. When the CPU accesses the process, it will have the new address dynamically
What is non-contiguous allocation?
Allows a process to acquire the several memory blocks at the different location in the memory according to its requirement
This reduces the memory wastage caused due to internal and external fragmentation
- Paging and segmentation are the two ways which allow a process’s physical address space to be non-contiguous.
How does segmentation work at the hardware level?
- using the segment table, we will first check whether the segment exists and see whether the offset is less than the limit. If yes, the mapping between the logical and physical address will be obtained by adding the offset to the base. This will obtained the physical address in memory. If the offset is bigger than the limit, an error will be raised
For paging, what is the address translation scheme?
The logical address generated by CPU is divided into:
- ● Page number (p) – used as an index into a page table which contains base address of each page in physical memory
- ● Page offset (d) – combined with base address to define the physical memory address that is sent to the memory unit
How does paging hardware work?
- the page table will be used to extract the frame number
- the logical address is translated to the physical address through info in the page table
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